1. Field of the Invention
The present invention generally relates to field emitter arrays, and more particularly to a process for fabricating a field emitter array including a mesh which provides a strong metal base and good thermal conductivity for mounting.
2. Description of the Related Art
Field emitter arrays typically include a metal/insulator/metal film sandwich with a cellular array of holes through the upper metal and insulator layers, leaving the edges of the upper metal layer (which serves as an accelerator or gate electrode) effectively exposed to the upper surface of the lower metal layer (which serves as an emitter electrode). A plurality of conically-shaped electron emitter elements are mounted on the lower metal layer and extend upwardly therefrom such that their respective tips are located in respective holes in the upper metal layer. If appropriate voltages are applied between the emitter electrode, accelerator electrode, and an anode located above the accelerator electrode, electrons are caused to flow from the respective cone tips to the anode.
This structure is comparable to a triode vacuum tube, providing amplification of a signal applied to the accelerator or gate electrode, and operates best when the space in which the electrodes are mounted is evacuated. The three electrode configuration is known as a field emitting triode or "fetrode". However, numerous other applications for field emitter arrays have been proposed, including extremely high resolution flat panel television displays. A major advantage of the field emitter array concept is that the arrays can be formed by conventional photolithographic techniques used in the fabrication of integrated microelectronic circuits. This enables field emitter elements to be formed with submicron spacing, using process steps integrated with the formation of signal processing and other microelectronic circuitry on a single chip. A general presentation of field emitter arrays is found in an article entitled "The Comeback of the Vacuum Tube: Will Semiconductor Versions Supplement Transistors?", by K. Skidmore, Semiconductor International Industry News, pp. 15-18 (Aug. 1988).
Field emitter arrays have been heretofore formed by two processes, the first of which is described in an article entitled "PHYSICAL PROPERTIES OF THIN-FILM FIELD-EMISSION CATHODES WITH MOLYBDENUM CONES", by C. A. Spindt et al, Journal of Applied Physics, vol. 47, no. 12, pp. 5248-5263 (Dec. 1976). The main steps of the process include depositing an insulator layer and a metal gate electrode layer on a silicon substrate, and forming holes through these layers down to the substrate. Molybdenum is deposited onto the substrate through the holes by electron beam evaporation from a small source. The size of the holes progressively decreases due to condensation of molybdenum on their peripheries. A cone grows inside each hole as the molybdenum vapor condenses on a smaller area, limited by the decreasing size of the aperture, and terminates in a point which constitutes an efficient source of electrons.
The second method of fabricating a field emitter array is disclosed in U.S. Pat. No. 4,307,507, issued Dec. 29, 1981, entitled "METHOD OF MANUFACTURING A FIELD-EMISSION CATHODE STRUCTURE", to H. Gray et al. In this method, a substrate of single crystal material is selectively masked such that the unmasked areas define islands on the underlying substrate. The single crystal material under the unmasked areas is orientation-dependent etched to form an array of holes whose sides intersect at a crystallographically sharp point. Following removal of the mask, the substrate is covered with a thick layer of material capable of emitting electrons which extends above the substrate surface and fills the holes. Thereafter, the material of the substrate underneath the layer of electron-emitting material is etched to expose a plurality of sharp field-emitter tips.
In both of these prior art processes, the field emitters are formed on a substrate made of a material such as silicon, which has relatively low thermal conductivity and physical strength. The structures are brittle and prone to structural failure during subsequent processing, and difficult or impossible to mount in a device package using a method such as high temperature soldering.